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Windows Mobile magazine ends, but iPhone Life launches on September 9th
Fri, 29 Aug 2008 15:18:52 -0700
While I get the majority of my news and content online, I still do subscribe to a few magazines including MacWorld, Laptop, and Smartphone & Pocket PC Magazine. I am very saddened by the news that there will be one final issue of Smartphone & Pocket PC Magazine. As you...
The biggest health tech story of our time
Fri, 29 Aug 2008 11:53:44 -0700
It's the sort of work politicians have been doing for decades, only with much greater depth, because the database is deeper, and with a purely scientific motivation. by Dana Blankenhorn
Where the Linux laptops live
Fri, 29 Aug 2008 10:29:45 -0700
Almost one-third of the 25 top-selling laptops at Amazon.com are sold with Linux. by Dana Blankenhorn
Psystar files answer to Apple complaint - "M" word used enthusiastically
Fri, 29 Aug 2008 08:53:32 -0700
Mac clone maker Psystar has filed answers to Apple's complaint. by Adrian Kingsley-Hughes
SLI comes to the Intel X58
Fri, 29 Aug 2008 08:22:33 -0700
It used to be that if you wanted to make use of NVIDIA's multi-GPU SLI solution, you were stuck having to buy a board that was fitted with an nForce chipset. X58 motherboards for Intel's Core i7 CPU changes that. by Adrian Kingsley-Hughes
Microsoft patents 'Page Up' and 'Page Down'
Fri, 29 Aug 2008 07:30:39 -0700
The software maker has been granted a US patent on "navigating paginated content in page-based increments." Microsoft has been granted a patent on 'Page Up' and 'Page Down' keystrokes. The software giant applied for the patent in 2005, and was granted it on August 19, 2008....

 

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A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming - Abstract of paper on Gmicro/FPU (floating-point unit), defines 23 coprocessor instructions; with references, purchase option. [IEEE Micro]
Meta Description: [ A description is given of the Gmicro/FPU (floating-point unit), a chip that provides floating-point instructions for both the Gmicro/200 and the Gmicro/300 microprocessors. The VLSI central-processing-unit architecture, for which it is designed, defines 23 coprocessor instructions, some of which ... ]

The Gmicro/100 32-Bit Microprocessor - Abstract of paper on Gmicro/100, 32-bit CISC VLSI, based on TRON specification; with references, purchase option. [IEEE Micro]
Meta Description: [ A description is given of the Gmicro/100, a 32-b VLSI microprocessor based on the TRON specification. The Gmicro/100 five-stage pipeline, prejump mechanism, and bitmap manipulation are examined. Performance results are reported. They show that the prejump mechanism, implemented as a hardware solu... ]

The Gmicro/500 Superscalar Microprocessor with Branch Buffers - Abstract of paper on Gmicro/500, with RISC-like dual-pipeline structure to execute basic instructions fast, upward-object-compatible with earlier Gmicro variants; with references, purchase option. [IEEE Micro]
Meta Description: [ The Gmicro/500, which features a RISC-like dual-pipeline structure for high-speed execution of basic instructions and represents a significant advance for the TRON architecture, is presented. Upwardly-object-compatible with earlier members of the Gmicro series, this microprocessor uses resident d... ]

TRON VLSI CPU - CISC 32-bit processor architecture developed to serve as main hardware building block of the realtime TRON Hypernetwork (Highly Functional Distributed System: HFDS), the ultimate goal of the TRON Project.