Gourt > Computers > Hardware > Buses > PCI Express
PCI Express, or PCIe, (formerly known as Arapaho or 3GIO for 3rd Generation I/O, not to be mistaken for PCI-X or PXI) is an implementation of the PCI computer bus that uses existing PCI programming concepts, but bases it on a completely different and much faster serial physical-layer communications protocol. The physical-layer consists not of a bus, but of a network of serial interconnects (because synchronization of parallel connections is hindered by timing skew) much like twisted pair ethernet. A single hub with many pins on the mainboard is used, allowing all kinds of switching and parallelism.
It is supported primarily by Intel, who started working on the standard as the Arapahoe project after pulling out of the InfiniBand system.
More on [ PCI Express ]
Say it ain't so AVG, say it ain't so: AVG LinkScanner = Badware?
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Airport security part 4: Attack of the body scanners!
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First look at Ubuntu 8.10 - Intrepid Ibex
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Opportunities - Explains in detail the challenges associated with implementation of PCI Express bus. Also looks at the rewards of going through with the implementation.
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AnandTech - Article covering history of the bus market and an explanation of how the specification works.
Meta Description: [ The next significant change in computer architecture, PCI Express is set to replace PCI and take interconnect design into the next decade. We take a look at what PCI Express is all about. ]
Ars Technica - Technical overview explaining basic PC system architecture, an explanation of how PCI and PCI-X work, and an outline of the benefits of PCIe, and PCIe to PCI bridging.
ASIC Architect - PCI Express Endpoint, Rootcomplex, Dual Mode, Switch Port IP Cores for ASIC/FPGA - Endpoint, Rootcomplex, Switch Port IP Cores for PCI Express. Total PCI Express Solution with Design Services and Support from IP Core Integration through Silicon Bring-up.
Meta Description: [ ASIC Architect - Endpoint, Rootcomplex, Switch Port IP Cores for PCI Express. Total PCI Express Solution with Design Services and Support from IP Core Integration through Silicon Bring-up. ]
Intel.com - Developer network for PCI Express architecture. Offers overview of the specification, introductory videos, details of books for developers, press releases and how to join the network.
Meta Description: [ Information about Intel® Developer Network for PCI Express* Architecture ]
Neoseeker.com - Article including a technology overview, comparison with older buses and considerations of its future prospects.
Meta Description: [ A Look at PCI Express ]
Official Home Page for ExpressCard Technology from PCMCIA - PC Card form factor for PCI Express.
PCI Express Bus Description - A very concise description of PCI Express Bus and its architecture.
Meta Description: [ PCI Express Bus design description and Peripheral Component Interface information, PCIe IC vendor links, PC Expansion Bus, Personal Computer Video Bus standard, and Jitter ]
PCI Express Compliance Testing - Gives an overview of the requirements for PCI Express Compliance testing.
Meta Description: [ Eureka Technology's PCI Express Endpoint Controller supports all 3 layers of PCI Express protocol as an endpoint device ]
PCI-SIG - Standards development group. Offers details of technology specifications, document review and compliance testing, test software and checklists and press releases.
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Tom's Hardware Guide - Article discussing the impact of PCI Express on the graphics and gaming market, its relative performance compared to AGP, and the responses of the two main graphic cards manufacturers to its introduction.
Meta Description: [ : Tom's Hardware Guide is the Internet's premiere resource for hardware news and reviews ]
Wikipedia - Article outlining the components of the protocol and competing formats.
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